clock_generator/firmware/src/main.c
finga 0065fb630f Generate a PWM signal for the display
Generate a variable duty cycle PWM signal for the dimmable display
backlight at a frequency of 1.25kHz.

For demo und testing purposes PD5 is currently fading between 0 and
100%.
2021-02-19 15:46:36 +01:00

32 lines
597 B
C

#define F_CPU 8000000UL
#include <avr/io.h>
#include <util/delay.h>
#include <stdbool.h>
int main(void) {
// FastPWM: 1.25kHz
TCCR0A = (1 << WGM01) | (1 << WGM00) | (1 << COM0B1);
TCCR0B = (1 << CS01) | (1 << WGM02); // prescaler = 8;
OCR0A = 100;
OCR0B = 10;
DDRD |= (1 << PD5);
bool reverse = 0;
while (1) {
_delay_ms(1);
if (OCR0B > 100)
reverse = !reverse;
if (reverse)
OCR0B++;
else
if (OCR0B > 0)
OCR0B--;
else
reverse = !reverse;
}
}