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A clock generator (Si5351) controlled by an ATmega328p.
1 commit 1 branch 0 tags 1 MiB
Rust 99.2%
OpenSCAD 0.8%
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finga 0065fb630f Generate a PWM signal for the display 
Generate a variable duty cycle PWM signal for the dimmable display
backlight at a frequency of 1.25kHz.

For demo und testing purposes PD5 is currently fading between 0 and
100%.
2021-02-19 15:46:36 +01:00
firmware/src Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00
.gitignore Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00