finga/clock_generator

103 commits 1 branch 0 tags 516 KiB

Author	SHA1	Message	Date
finga	d14f1c33e0	Draw splash screen Hail sacred chao, kallisti!	2021-02-27 15:17:01 +01:00
finga	7f7d7b628a	Interact with the display Enable the SPI bus to configure the display and program its ram. For that the fastest available SPI clock is used. To configure the display a minimal config is used which is not identical but similar to the displays datasheet. The display can only be filled columnwise so far.	2021-02-27 02:26:57 +01:00
finga	0065fb630f	Generate a PWM signal for the display Generate a variable duty cycle PWM signal for the dimmable display backlight at a frequency of 1.25kHz. For demo und testing purposes PD5 is currently fading between 0 and 100%.	2021-02-19 15:46:36 +01:00

Author

SHA1

Message

Date

finga

d14f1c33e0

Draw splash screen

Hail sacred chao, kallisti!

2021-02-27 15:17:01 +01:00

finga

7f7d7b628a

Interact with the display

Enable the SPI bus to configure the display and program its ram. For
that the fastest available SPI clock is used. To configure the display
a minimal config is used which is not identical but similar to the
displays datasheet. The display can only be filled columnwise so far.

2021-02-27 02:26:57 +01:00

finga

0065fb630f

Generate a PWM signal for the display

Generate a variable duty cycle PWM signal for the dimmable display
backlight at a frequency of 1.25kHz.

For demo und testing purposes PD5 is currently fading between 0 and
100%.

2021-02-19 15:46:36 +01:00

103 commits