A clock generator (Si5351) controlled by an ATmega328p.
finga
7f7d7b628a
Enable the SPI bus to configure the display and program its ram. For that the fastest available SPI clock is used. To configure the display a minimal config is used which is not identical but similar to the displays datasheet. The display can only be filled columnwise so far. |
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firmware/src | ||
.gitignore |