finga/clock_generator
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A clock generator (Si5351) controlled by an ATmega328p.
5 commits 1 branch 0 tags 516 KiB
Rust 99.2%
OpenSCAD 0.8%
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finga 86ec90b202 Minimal encoder input handling 
It is now possible to act on the encoders input. No effort regarding
debouncing and dechattering has been done yet.
2021-09-08 13:58:24 +02:00
firmware/src Minimal encoder input handling 2021-09-08 13:58:24 +02:00
.gitignore Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00