finga
3f19ad6ee9
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Due to limiting the codegen units to 1 the size of the program memory can be reduced roughly by 10% and the data memory by a bit more than 20%.
84 lines
3.1 KiB
Markdown
84 lines
3.1 KiB
Markdown
# Clock Generator [](https://ci.onders.org/finga/clock_generator)
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The "Clock Generator" generates up to three different clock signals
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between 15kHz and 162MHz.
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Though, the board is not limited to this, it is designed to also be
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usable for other applications.
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## Board
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The board is populated with an ATmega328p, an LCD and its backlight
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driver, a rotary encoder which is also a push button and is powered
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via mini USB. The TWI port of the ATmega interfaces the Si5351 which
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is also driven from VCC and GND, a pin breakout for all unused pins
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and some more VCC and GND pins as well as an ICSP header.
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The general supply voltage behind the LDO regulator is 3.3V
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Note that in the PCB layout the display and the rotary encoder are
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placed on the backside of the PCB.
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### ATmega328p
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The Atmega328p is programmable via the ICSP header and is the center
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piece of the board. All free pins can be used with J3 and the TWI with
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J4.
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#### Connectors
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##### Breakout (J3)
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| Pin left | ATmega328p | ATmega328p | Pin right |
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|----------|------------|------------|-----------|
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| 1 | +3.3V | +3.3V | 2 |
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| 3 | PC1 | PD2 | 4 |
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| 5 | PC2 | PD3 | 6 |
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| 7 | PC3 | PD4 | 8 |
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| 9 | PD0 | PD6 | 10 |
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| 11 | PD1 | PD7 | 12 |
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| 13 | GND | GND | 14 |
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##### TWI (J4)
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| Pin | Signal |
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|-----|--------|
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| 1 | +3.3V |
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| 2 | GND |
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| 3 | SDA |
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| 4 | SCL |
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### Si5351
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The Si5351 is capable of generating three 8kHz to 160MHz clock
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signals.
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Internally, the Si5351 consists out of two phase locked loops which
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feed three parallel and independently configurable clock synthesizers.
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### Display
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The DOGS102 graphic LCD module is controlled by SPI (Serial Peripheral
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Interface) and the RST (reset) and CD (control data/display data)
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pins. The contrast can be configured on the setup screen and its value
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is stored in the EEPROM (Electrically Erasable Programmable Read-Only
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Memory) of the ATmega.
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#### Backlight
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To drive the backlight, the Timer/Counter0 from the ATmega are used to
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generate a PWM (Pulse Width Modulation) signal. This enables the
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backlight to be variably bright. The brightness can also be configured
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on the setup screen, and is stored inside the EEPROM.
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### Rotary Encoder
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To control the Clock Generator a single rotary encoder which is also a
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push button is used.
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## Firmware/Programming
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Currently, there are two different implementations of the
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firmware. The older one which is written in C and is not finished, and
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the newer one which is in an early but functioning state and written
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in Rust.
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Note that mostly due to the display, the supply voltage after the LDO
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regulator is 3.3V.
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### The Rust Firmware
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To flash the firmware, connect the ICSP pins of the board to the
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programmer and inside the `firmware/rust/` directory run `cargo make
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--profile release all`. This compiles the firmware with the release
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profile, burns the fuses, writes the default configuration values to
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the EEPROM and flashes the firmware.
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