board: Add vias and raise KiCAD version
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Add vias and raise KiCAD version.
This commit is contained in:
finga 2022-04-17 01:24:22 +02:00
parent f48955974d
commit dbf5733488
10 changed files with 11574 additions and 6688 deletions

View file

@ -94,42 +94,6 @@ X Pin_9 9 -200 -100 150 R 50 50 1 1 P
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# Connector_USB_B_Mini
#
DEF Connector_USB_B_Mini J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "Connector_USB_B_Mini" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
ALIAS USB_B_Mini
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -205 170 -195 0 1 0 N
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 2 0 1 10 -75 85 25 85 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
X VBUS 1 300 200 100 L 50 50 1 1 w
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X ID 4 300 -200 100 L 50 50 1 1 P
X GND 5 0 -400 100 U 50 50 1 1 w
X Shield 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C # Device_C
# #
DEF Device_C C 0 10 N Y 1 F N DEF Device_C C 0 10 N Y 1 F N
@ -163,8 +127,8 @@ $FPLIST
$ENDFPLIST $ENDFPLIST
DRAW DRAW
P 2 0 1 0 50 0 -50 0 N P 2 0 1 0 50 0 -50 0 N
P 4 0 1 8 50 50 50 -50 -50 0 50 50 N P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
P 6 0 1 8 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N P 6 0 1 10 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N
X K 1 -150 0 100 R 50 50 1 1 P X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW ENDDRAW
@ -248,14 +212,33 @@ X S2 S2 300 -100 100 L 50 50 1 1 P
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# MCU_Microchip_ATmega_ATmega328P-PU # clock_gen-rescue_AP2112K-3.3-Regulator_Linear
# #
DEF MCU_Microchip_ATmega_ATmega328P-PU U 0 20 Y Y 1 F N DEF clock_gen-rescue_AP2112K-3.3-Regulator_Linear U 0 10 Y Y 1 F N
F0 "U" -200 225 50 H V L CNN
F1 "clock_gen-rescue_AP2112K-3.3-Regulator_Linear" 0 225 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23-5" 0 325 50 H I C CNN
F3 "" 0 100 50 H I C CNN
$FPLIST
SOT?23?5*
$ENDFPLIST
DRAW
S -200 175 200 -200 0 1 10 f
X VIN 1 -300 100 100 R 50 50 1 1 W
X GND 2 0 -300 100 U 50 50 1 1 W
X EN 3 -300 0 100 R 50 50 1 1 I
X NC 4 300 0 100 L 50 50 1 1 N N
X VOUT 5 300 100 100 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
# clock_gen-rescue_ATmega328P-PU-MCU_Microchip_ATmega
#
DEF clock_gen-rescue_ATmega328P-PU-MCU_Microchip_ATmega U 0 20 Y Y 1 F N
F0 "U" -500 1450 50 H V L BNN F0 "U" -500 1450 50 H V L BNN
F1 "MCU_Microchip_ATmega_ATmega328P-PU" 100 -1450 50 H V L TNN F1 "clock_gen-rescue_ATmega328P-PU-MCU_Microchip_ATmega" 100 -1450 50 H V L TNN
F2 "Package_DIP:DIP-28_W7.62mm" 0 0 50 H I C CIN F2 "Package_DIP:DIP-28_W7.62mm" 0 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN
ALIAS ATmega48P-20PU ATmega48A-PU ATmega48PA-PU ATmega88PV-10PU ATmega88P-20PU ATmega88A-PU ATmega88PA-PU ATmega168PV-10PU ATmega168P-20PU ATmega168A-PU ATmega168PA-PU ATmega328-PU ATmega328P-PU
$FPLIST $FPLIST
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$ENDFPLIST $ENDFPLIST
@ -292,24 +275,38 @@ X XTAL1/PB6 9 600 600 100 L 50 50 1 1 T
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# Regulator_Linear_AP2112K-3.3 # clock_gen-rescue_USB_B_Mini-Connector
# #
DEF Regulator_Linear_AP2112K-3.3 U 0 10 Y Y 1 F N DEF clock_gen-rescue_USB_B_Mini-Connector J 0 40 Y Y 1 F N
F0 "U" -200 225 50 H V L CNN F0 "J" -200 450 50 H V L CNN
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F3 "" 0 100 50 H I C CNN F3 "" 150 -50 50 H I C CNN
ALIAS AP2204K-1.8 AP2204K-2.5 AP2204K-2.8 AP2204K-3.0 AP2204K-3.3 AP2204K-5.0 AP2127K-1.0 AP2127K-1.2 AP2127K-1.5 AP2127K-1.8 AP2127K-2.5 AP2127K-2.8 AP2127K-3.0 AP2127K-3.3 AP2127K-4.2 AP2127K-4.75 AP2112K-1.2 AP2112K-1.8 AP2112K-2.5 AP2112K-2.6 AP2112K-3.3
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S 200 -5 170 5 0 1 0 N
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P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
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X ID 4 300 -200 100 L 50 50 1 1 P
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X Shield 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #

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@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

102
board/clock_gen-rescue.lib Normal file
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@ -0,0 +1,102 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# AP2112K-3.3-Regulator_Linear
#
DEF AP2112K-3.3-Regulator_Linear U 0 10 Y Y 1 F N
F0 "U" -200 225 50 H V L CNN
F1 "AP2112K-3.3-Regulator_Linear" 0 225 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23-5" 0 325 50 H I C CNN
F3 "" 0 100 50 H I C CNN
$FPLIST
SOT?23?5*
$ENDFPLIST
DRAW
S -200 175 200 -200 0 1 10 f
X VIN 1 -300 100 100 R 50 50 1 1 W
X GND 2 0 -300 100 U 50 50 1 1 W
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X NC 4 300 0 100 L 50 50 1 1 N N
X VOUT 5 300 100 100 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
# ATmega328P-PU-MCU_Microchip_ATmega
#
DEF ATmega328P-PU-MCU_Microchip_ATmega U 0 20 Y Y 1 F N
F0 "U" -500 1450 50 H V L BNN
F1 "ATmega328P-PU-MCU_Microchip_ATmega" 100 -1450 50 H V L TNN
F2 "Package_DIP:DIP-28_W7.62mm" 0 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
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X ~RESET~/PC6 1 600 -300 100 L 50 50 1 1 T
X XTAL2/PB7 10 600 500 100 L 50 50 1 1 T
X PD5 11 600 -1000 100 L 50 50 1 1 T
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X PD7 13 600 -1200 100 L 50 50 1 1 T
X PB0 14 600 1200 100 L 50 50 1 1 T
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X PB4 18 600 800 100 L 50 50 1 1 T
X PB5 19 600 700 100 L 50 50 1 1 T
X PD0 2 600 -500 100 L 50 50 1 1 T
X AVCC 20 100 1500 100 D 50 50 1 1 W
X AREF 21 -600 1200 100 R 50 50 1 1 P
X GND 22 0 -1500 100 U 50 50 1 1 P N
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X PC3 26 600 0 100 L 50 50 1 1 T
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X GND 8 0 -1500 100 U 50 50 1 1 W
X XTAL1/PB6 9 600 600 100 L 50 50 1 1 T
ENDDRAW
ENDDEF
#
# USB_B_Mini-Connector
#
DEF USB_B_Mini-Connector J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "USB_B_Mini-Connector" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
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P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
X VBUS 1 300 200 100 L 50 50 1 1 w
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X ID 4 300 -200 100 L 50 50 1 1 P
X GND 5 0 -400 100 U 50 50 1 1 w
X Shield 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

File diff suppressed because it is too large Load diff

75
board/clock_gen.kicad_prl Normal file
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@ -0,0 +1,75 @@
{
"board": {
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"hidden_nets": [],
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431
board/clock_gen.kicad_pro Normal file
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@ -0,0 +1,431 @@
{
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3429
board/clock_gen.kicad_sch Normal file

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@ -1,6 +1,5 @@
EESchema Schematic File Version 4 EESchema Schematic File Version 4
LIBS:clock_gen-cache EELAYER 30 0
EELAYER 26 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
encoding utf-8 encoding utf-8
@ -15,7 +14,7 @@ Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
$Comp $Comp
L MCU_Microchip_ATmega:ATmega328P-PU U4 L clock_gen-rescue:ATmega328P-PU-MCU_Microchip_ATmega U4
U 1 1 603004D8 U 1 1 603004D8
P 2150 5800 P 2150 5800
F 0 "U4" H 1509 5846 50 0000 R CNN F 0 "U4" H 1509 5846 50 0000 R CNN
@ -60,7 +59,7 @@ ICSP
Text Notes 5450 5900 0 125 ~ 25 Text Notes 5450 5900 0 125 ~ 25
I2C I2C
$Comp $Comp
L Connector:USB_B_Mini J1 L clock_gen-rescue:USB_B_Mini-Connector J1
U 1 1 610FCCC0 U 1 1 610FCCC0
P 1900 1500 P 1900 1500
F 0 "J1" H 1955 1967 50 0000 C CNN F 0 "J1" H 1955 1967 50 0000 C CNN
@ -384,7 +383,7 @@ Connection ~ 3550 5100
Wire Wire Line Wire Wire Line
3550 5100 3550 5400 3550 5100 3550 5400
$Comp $Comp
L Regulator_Linear:AP2112K-3.3 U1 L clock_gen-rescue:AP2112K-3.3-Regulator_Linear U1
U 1 1 6111CFDB U 1 1 6111CFDB
P 3000 1400 P 3000 1400
F 0 "U1" H 3000 1742 50 0000 C CNN F 0 "U1" H 3000 1742 50 0000 C CNN

File diff suppressed because it is too large Load diff

3
board/sym-lib-table Normal file
View file

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name clock_gen-rescue)(type Legacy)(uri ${KIPRJMOD}/clock_gen-rescue.lib)(options "")(descr ""))
)