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clock_generator/firmware/src/main.c

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Generate a PWM signal for the display Generate a variable duty cycle PWM signal for the dimmable display backlight at a frequency of 1.25kHz. For demo und testing purposes PD5 is currently fading between 0 and 100%.
2021-02-18 22:00:24 +01:00
#define F_CPU 8000000UL
#include <avr/io.h>
#include <util/delay.h>
#include <stdbool.h>
Interact with the display Enable the SPI bus to configure the display and program its ram. For that the fastest available SPI clock is used. To configure the display a minimal config is used which is not identical but similar to the displays datasheet. The display can only be filled columnwise so far.
2021-02-27 02:26:57 +01:00
#define SPI_PORT PORTB
#define SPI_DDR DDRB
#define SPI_SCK PB5
#define SPI_MOSI PB3
#define SPI_SS PB2
#define LCD_CD PB6
#define LCD_RST PB1
Draw splash screen Hail sacred chao, kallisti!
2021-02-27 14:49:06 +01:00
const uint8_t splash[816] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xC0, 0xE0, 0xF0, 0xF0, 0xF8, 0xFC, 0xFC, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFE, 0xFE, 0xFC, 0xFC, 0xF8, 0xF0, 0xF0, 0xE0, 0xC0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xF0, 0xFC, 0xFE, 0xFF, 0xFF, 0x7F, 0x3F, 0x1F, 0x3F, 0x3F, 0x7F, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x1F, 0x0F, 0x0F, 0x07, 0x07, 0x07, 0x03, 0xC3, 0xE3, 0x73, 0x37, 0x17, 0x07, 0x0F, 0x1E, 0x3C, 0xF0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xE7, 0xC3, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0x0F, 0x00, 0x00, 0xFC, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFC, 0x30, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0F, 0x3F, 0x4F, 0x9F, 0x3F, 0x3E, 0x3C, 0x7C, 0x7C, 0x7C, 0x7C, 0x3E, 0x3E, 0x3E, 0x1F, 0x1F, 0x0F, 0x07, 0x01, 0x00, 0x00, 0x00, 0x01, 0x03, 0x07, 0x07, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x07, 0x07, 0x03, 0x81, 0x40, 0x30, 0x0E, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x04, 0x08, 0x08, 0x10, 0x20, 0x20, 0x40, 0x40, 0x40, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x40, 0x40, 0x20, 0x20, 0x10, 0x08, 0x08, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x60, 0xE0, 0x00, 0x00, 0xE0, 0x60, 0xE0, 0x00, 0x00, 0xE0, 0x60, 0xF8, 0x00, 0x00, 0xE0, 0xA0, 0xE0, 0x00, 0x00, 0xE0, 0x20, 0x60, 0x00, 0x00, 0xE0, 0xA0, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x60, 0xE0, 0x00, 0x00, 0xE0, 0x20, 0x60, 0x00, 0x00, 0xE0, 0x60, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x02, 0x03, 0x00, 0x00, 0x03, 0x00, 0x03, 0x00, 0x00, 0x03, 0x02, 0x03, 0x00, 0x00, 0x03, 0x02, 0x02, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x02, 0x03, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x0A, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
Interact with the display Enable the SPI bus to configure the display and program its ram. For that the fastest available SPI clock is used. To configure the display a minimal config is used which is not identical but similar to the displays datasheet. The display can only be filled columnwise so far.
2021-02-27 02:26:57 +01:00
void spi_init(void) {
SPI_DDR |= (1 << SPI_SCK) | (1 << SPI_MOSI) | (1 << SPI_SS);
SPI_PORT |= (1 << SPI_SS);
SPCR = (1 << SPE) | (1 << MSTR);
SPSR = (1 << SPI2X);
}
uint8_t spi_byte(uint8_t data) {
SPDR = data;
while(!(SPSR & (1 << SPIF)));
return SPDR;
}
void lcd_write(uint8_t data) {
SPI_PORT &= ~(1 << SPI_SS);
spi_byte(data);
SPI_PORT |= (1 << SPI_SS);
}
void lcd_init(void) {
SPI_DDR |= (1 << LCD_CD) | (1 << LCD_RST);
_delay_ms(1);
SPI_PORT |= (1 << LCD_RST);
_delay_ms(5);
lcd_write(0x40); // (6) Set Scroll Line: Display start line 0
lcd_write(0xA1); // (13) Set SEG direction: SEG reverse
lcd_write(0xC0); // (14) Set COM direction: Normal COM0 - COM63
lcd_write(0xA6); // (11) Set Inverse Display: Display inverse off
lcd_write(0xA2); // (17) Set LCD Bias Ratio: Set Bias 1/9 (Duty 1/65)
lcd_write(0x2F); // (5) Set Power Control: Booster, Regulator and Follower on
lcd_write(0x27); // (8) Set VLCD Resistor Ratio: Set Contrast
lcd_write(0x81); // (9) Set Electronic Volume: Set Contrast
lcd_write(0x10); // (9) Set Electronic Volume: Set Contrast
lcd_write(0xAF); // (12) Set Display Enable: Display on
}
void lcd_fill(uint8_t data) {
for (uint8_t i = 0; i < 8; i++) {
SPI_PORT &= ~(1 << LCD_CD);
lcd_write(0x00);
lcd_write(0x10);
lcd_write(0xB0 + i); // page address 0 + i
SPI_PORT |= (1 << LCD_CD);
for (uint8_t j = 0; j < 102; j++) {
lcd_write(data);
}
}
}
Draw splash screen Hail sacred chao, kallisti!
2021-02-27 14:49:06 +01:00
void lcd_splash() {
for (uint8_t i = 0; i < 8; i++) {
SPI_PORT &= ~(1 << LCD_CD);
lcd_write(0x00);
lcd_write(0x10);
lcd_write(0xB0 + i);
SPI_PORT |= (1 << LCD_CD);
for (uint8_t j = 0; j < 102; j++) {
lcd_write(splash[i * 102 + j]);
}
}
}
Generate a PWM signal for the display Generate a variable duty cycle PWM signal for the dimmable display backlight at a frequency of 1.25kHz. For demo und testing purposes PD5 is currently fading between 0 and 100%.
2021-02-18 22:00:24 +01:00
int main(void) {
// FastPWM: 1.25kHz
TCCR0A = (1 << WGM01) | (1 << WGM00) | (1 << COM0B1);
TCCR0B = (1 << CS01) | (1 << WGM02); // prescaler = 8;
OCR0A = 100;
OCR0B = 10;
DDRD |= (1 << PD5);
bool reverse = 0;
Interact with the display Enable the SPI bus to configure the display and program its ram. For that the fastest available SPI clock is used. To configure the display a minimal config is used which is not identical but similar to the displays datasheet. The display can only be filled columnwise so far.
2021-02-27 02:26:57 +01:00
spi_init();
lcd_init();
Draw splash screen Hail sacred chao, kallisti!
2021-02-27 14:49:06 +01:00
lcd_splash();
Interact with the display Enable the SPI bus to configure the display and program its ram. For that the fastest available SPI clock is used. To configure the display a minimal config is used which is not identical but similar to the displays datasheet. The display can only be filled columnwise so far.
2021-02-27 02:26:57 +01:00
Generate a PWM signal for the display Generate a variable duty cycle PWM signal for the dimmable display backlight at a frequency of 1.25kHz. For demo und testing purposes PD5 is currently fading between 0 and 100%.
2021-02-18 22:00:24 +01:00
while (1) {
_delay_ms(1);
if (OCR0B > 100)
reverse = !reverse;
if (reverse)
OCR0B++;
else
if (OCR0B > 0)
OCR0B--;
else
reverse = !reverse;
}
}
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