finga/clock_generator
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A clock generator (Si5351) controlled by an ATmega328p.
7 commits 1 branch 0 tags 516 KiB
Rust 99.2%
OpenSCAD 0.8%
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finga cd2c6cf196 Improve splash screen 
The splash screen blob is now splitted in to parts in order to reduce
zero valued memory space.
2021-09-08 14:04:07 +02:00
firmware/src Improve splash screen 2021-09-08 14:04:07 +02:00
.gitignore Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00