finga/clock_generator
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A clock generator (Si5351) controlled by an ATmega328p.
8 commits 1 branch 0 tags 516 KiB
Rust 99.2%
OpenSCAD 0.8%
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finga 727f89eeb0 Basic state handling 
Prepare for handling of different screens and their states and add a
minimal menu.
2021-09-08 14:53:29 +02:00
firmware/src Basic state handling 2021-09-08 14:53:29 +02:00
.gitignore Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00