finga/clock_generator
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A clock generator (Si5351) controlled by an ATmega328p.
13 commits 1 branch 0 tags 1 MiB
Rust 99.2%
OpenSCAD 0.8%
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finga 6eb515e2d4 Display digits and integers 
Display digits and integers, for the later displaying leading zeroes
is supported via parameter. Demo integers are displayed in the setup
screen.
2021-09-11 00:19:59 +02:00
firmware/src Display digits and integers 2021-09-11 00:19:59 +02:00
.gitignore Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00