finga/clock_generator
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A clock generator (Si5351) controlled by an ATmega328p.
30 commits 1 branch 0 tags 1 MiB
Rust 99.2%
OpenSCAD 0.8%
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finga 2579ae3686 Print actual status and data on TWI error 
The contents of `TWSR` (TWI Status Register) and `TWDR` (TWI Data
Register) are printed when an error occured.
2021-09-23 22:47:17 +02:00
firmware/src Print actual status and data on TWI error 2021-09-23 22:47:17 +02:00
.gitignore Generate a PWM signal for the display 2021-02-19 15:46:36 +01:00